A Time-Domain Synthesis Method for Breaking Capacity Test Circuit

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A Time-Domain Synthesis Method for Breaking Capacity Test Circuit

更新时间：2025-04-26

- A Time-Domain Synthesis Method for Breaking Capacity Test Circuit
- High VoltageApparatus Issue 4, Pages: 3-11(1990)
- 作者机构：
  
  1. 西安高压电器研究所
  2. 清华大学
  3. 西安高压电器研究所清华大学
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：1990
- 稿件说明：
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[1]王仁甫,钱家骊,江缉光.断流能力试验回路的时域综合[J].高压电器,1990(04):3-11.

A Time-Domain Synthesis Method for Breaking Capacity Test Circuit[J]. High voltageapparatus, 1990, (4): 3-11.
[1]王仁甫,钱家骊,江缉光.断流能力试验回路的时域综合[J].高压电器,1990(04):3-11. DOI：

A Time-Domain Synthesis Method for Breaking Capacity Test Circuit[J]. High voltageapparatus, 1990, (4): 3-11. DOI：

摘要

本文介绍按IEC标准所规定的TRV（瞬态恢复电压）要求

确定断流能力试验回路拓扑结构及元件参数的对域综合法

利用这一技术获得了大容量试验室中常用的一些开断试验回路。

Abstract

This paper presents a time-domain synthesis method for determining the topological structure and component parameters of breaking-capacity testing circuits according to TRV requirements specified by IEC standards.Some breaking capacity testing-circuits commonly used in high power laboratories are gained with this technique.

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